Bulletins from the Pacific Packet Radio Society - page 066

schedule, to no one's complete surprise. Nonetheless, considerable progress has been made. By May 8, the following Alpha-level hardware goals had been achieved:

* interface of the TNC to a variety of terminals/computers

* self-test at power-on with status report

* activation of the HDLC controller

* activation of the CW ID facility

* verification of parallel port operation

* verification of NOVRAM interface

* verification of the watchdog timer function

* verification of the modem design and interface

* on-board calibration of modem frequencies to +/- 5 Hz.

In addition, a major software achievement was realized on May 1, when N7AIG, aided and harassed by WA7GXD and Mark Baker (TAPR secretary, no call yet), got an advanced version of STC FORTH running on the TNC in a standalone configuration. This was a major test of N7AIG's MetaFORTH target compiler (running on his Apple), and Dave's efforts have made the Hardware Committee's debugging and low-level driver coding tasks much easier.

It is now anticipated that TNC's will be talking to each other in the very near future. Hardware efforts will then turn to Beta activities, including a meeting with the Computer-Aided Design (CAD) boys for possible compute r-generation of the Beta artwork. Component suppliers are beating our doors down in an attempt to make the Beta (and beyond) boards lower in cost, and We're listening! Our goal is to make the TNC, as well as future developments, available to the entire Amateur Community on a non-profit basis. (Yes, we are capitalists, but we just don't believe in making money off of our Amateur brethren.)

Now for a look at the microprocessor side of the TNC design.

The TNC has a specific mission -- implement the lowest layers of packet protocol. Since the definition of these layers is in a state of flux, the TNC must be very adaptable. This implies programmability, and in today's world, this means a microcomputer. Thus, the TNC is a small, dedicated-function computer.

Naturally, virtually every silicon foundry has a pet microprocessor (uP) and they are not necessarily compatible with each other. Every family in the microprocessor world has its unique, special function peripheral parts, and some of these are very useful in the specific case of a TNC design. The rub comes when a project requires the use of a certain uP, and the uP

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